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    Research on Hyper Parallel Processing Architecture
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    Update time: 2009-08-19
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    NSFC Key Project: Research on Hyper Parallel Processing Architecture
    Grant No. 60633040
    PI: Professor SUN Ninghui
    Abstract:
    The trend of high-productivity microprocessor technology is integrating more processor  cores, using more coarse-grained thread-level and data-level parallelism to improve the  performance and reduce complexity, power, cost at the same time. When building high  performance computer based on multicore CPU chip, the chip level parallelism will be  added to the system. Thus will form a new chip-node-system three-level parallel  architecture, each level has certain complexity. The total scale will reach more than 10  thousands processor cores. According to this trend, the hyper-parallel processing  architecture will be researched in this project. The new parallel computing model, the  balance design of computation, storage, communication, interconnection and I/O  infrastructure, as well as operating system, programming model, application optimization  will be studied. Though theoretical model, full system simulation and application  benchmarking the system productivity will be evaluated and verified. The research work  of this project will provided theoretical and experimental suggestions and key  technologies to the next generation peta-flops high productivity computer  architecture.  

     

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