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    Scaling the Main Memory System in the Many-Core Era
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    Update time: 2012-06-25
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    Time: 15:30-17:00 p.m.,Jun. 28, 2012 (Thursday)

    Place:Room 446, ICT. CAS

    Speaker: OnurMutlu

    Abstract

    The main memory system is a fundamental performance and energybottleneck in almost all computing systems. Recent trends towardsincreasingly more cores on die, consolidation of diverse workloadson a single chip, and difficulty of DRAM scaling impose new requirementsand exacerbate old demands on the memory system.In particular, the need for memory bandwidth and capacity is increasing,applications’ interference in memory system increasinglylimits system performance and makes the system hard to control,memory energy and power are key design concerns,and DRAM technology consumes significant amount of energy anddoes not scale down easily to smaller technology nodes. Fortunately,some promising solution directions exist. In this talk, we will cover our recentresearch on tackling challenges related to scaling the capacity,energy-efficiency, bandwidth, and feature size of main memory.We will examine three major solution directions: 1) how to design moreefficient and higher-bandwidth DRAM architectures, 2) how to employemerging memory technologies in a hybrid memory system, and, if time permits,3) how to enable more predictable and QoS-aware main memory systems.

    Bio

    OnurMutlu is an Assistant Professor of ECE (and by courtesy CSD) atCarnegie Mellon University. His broader research interests are in computerarchitecture and systems, especially in the interactions between languages,operating systems, compilers, and microarchitecture. He enjoys teachingand researching important and relevant problems in computer architecture,including problems related to the design of memory systems, multi-corearchitectures, and scalable and efficient systems. He obtained his PhD andMS in ECE from the University of Texas at Austin (2006) and BS degreesin Computer Engineering and Psychology from the University of Michigan,Ann Arbor. Prior to Carnegie Mellon, he worked at Microsoft Research(2006-2009), Intel Corporation, and Advanced Micro Devices. He was arecipient of the IEEE Computer Society Young Computer Architect Award,CMU College of Engineering George Tallman Ladd Research Award,ASPLOS and VTS Best Paper Awards in 2010, NSF CAREER Award,Microsoft Gold Star Award, University of Texas Graduate ResearchExcellence Award, and a number of “computer architecture top pick” paperselections by the IEEE Micro magazine. For more information, pleasesee http://www.ece.cmu.edu/~omutlu.

     

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