HyperTransport is a state-of-art packet-based, high-bandwidth, scalable, low latency point-to-point interconnect technology that links processors to each other, processors to coprocessors and processors to I/O and peripheral controllers. HyperTransport technology is a highly optimized, high performance board-level architecture for embedded and open-architecture systems. At present, it can provide up to 51.2Gigabyte/second aggregate CPU to I/O or CPU to CPU bandwidth in a highly efficient chip-to-chip technology that replaces existing complex multi-level buses. In addition to delivering the industry's highest bandwidth, frequency scalability, and lowest implementation cost. The technology is software compatible with legacy Peripheral Component Interconnect (PCI), PCI-X and PCI Express technologies. HyperTransport technology delivers the state-of-art bandwidth by means of easy-to-implement Low Voltage Differential Signaling (LVDS) point-to-point links, delivering increased data throughput while minimizing signal crosstalk and EMI. It employs a packet-based data protocol to eliminate many sideband (control and command) signals and supports asymmetric, variable width data paths.
As a processor-native interconnect, HyperTransport has been integrated in a large number of CPUs and processor families from multiple manufacturers. HyperTransport -powered processors serve a wide variety of performance-intensive applications, including x86 computing, graphics and 3D rendering, security processing, real-time data/packet analysis, media processing, application-specific acceleration and co-processing. HyperTransport has been adopted by technology leaders for the widest range of product applications. HyperTransport’s market-proven solidity and highly efficient protocol make it the ideal choice as chip-to-chip, board-to-board and chassis-to-chassis high-performance interconnect, successfully deployed in the widest rage of consumer, commercial and mission-critical applications, including gaming systems, embedded designs, networking equipment, personal computers, workstations, servers, and supercomputers. Since its inception in 2001, the Consortium has pushed HyperTransport technology toward greater performance, features, architectural flexibility and reliability through new revisions of the HyperTransport link, the HTX slot connector and the High Node Count specifications. Below is a synthetic view of HyperTransport technology evolution.
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