- The Institute of Computing Technology and its researchers play an essential role in the RISC-V International Foundation
- The RISC-V International Foundation was founded in 2015 and moved its headquarters from the United States to Switzerland in March 2020. It is responsible for standardizing, protecting and promoting RISC-V instruction set architecture and its hardware and software ecology. The foundation is going forward in a historical and critical period. A number of countries regard RISC-V development as a mid- to long-term development strategy to break technical restrictions. Enterprises and institutions of different countries actively join the foundation to enhance their voice, leadership and influence in technical development by joining the board of directors or technical steering committee.
- The earliest organization in China to join the RISC-V foundation was the Institute of Computing Technology of the Chinese Academy of Sciences (ICT, CAS). ICT is a founding member and has been a senior member since the foundation’s inception. ICT is also one of the development partners. With Professor Yungang Bao on the RISC-V foundation board of directors and Associate Professor Ka n Shi as a member of its technical steering committee, ICT is striving for intellectual property standards in favor of China, vigorously promoting development of a domestic RISC-V industry, and effectively enhancing China’s influence in the global RISC-V community.
- ICT established CRVA (China RISC-V Alliance) to create a bridge for international and domestic RISC-V collaborations
- A prominent representative of open-source chip technology, the RISC-V open instruction set architecture has drawn attention in technical and engineering fields worldwide. ICT together with domestic enterprises and universities in 2018 established the China RISC-V Alliance (CRVA), a national, comprehensive, joint nonprofit to bring together enterprises, research institutions and related social groups engaged in RISC-V instruction set, architecture, chip, software, applications and industrial chain links.
- Since its establishment, CRVA has jointly organized events with RISC-V International Foundation such as a World Internet Conference, and a RISC-V China Summit, building a bridge for domestic and international collaboration. The CRVA organization is composed of an alliance assembly, council, executive council, and expert advisory committee. Under the organization of the council is the secretariat, which is set up in ICT, CAS, with. Prof. Yungang Bao serving as secretary-general.
- Three ongoing open source projects in CRVA are labeled RISC-V, SERVE.r (both in ICT), and X-core from PerfXLab. CRVA holds an annual Alliance Technical Seminar, to share research, technical experience and the progress of RISC-V at home and abroad. This seminar promotes extensive communication among domestic and international experts in RISC-V processor design, development tools, IP cores and SoC, system software and other cutting-edge fields.
- ICT deployed a series of efforts to accelerate the development of the RISC-V ecosystem
- RISC-V is an emerging open instruction set that differs from the company’s proprietary x86 and ARM architectures. RISC-V is created under the motto, “Instruction sets want to be free.” RISC-V has developed rapidly in recent years, and the RISC-V foundation counts 111 open or commercial RISC-V processor cores worldwide. About 10 billion RISC-V architecture cores had been shipped worldwide as of June 2022.
- ICT, actively involved in RISC-V, promotes RISC-V ecology’s development in China. An early member of RISC-V International Foundation, ICT led the establishment of CRVA, and by 2021, the “Xiangshan” open-source high-performance RISC-V processor core was released. It has been continuously optimized and iterated, becoming the world’s leading open-source RISC-V processor core design.
- Under joint promotion by the Beijing government and ICT, the Beijing Open Source Chip Research Institute was established on December 6, 2021, dedicated to building an open-source chip technology system and accelerating development of an open-source chip ecosystem.
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