Professor Guihai Yan is leading the ADAPT (Architecture for Data Analytics & Processing Technology) group at Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS). His research interests include computer architectures, heterogeneous computing, and domain-specific accelerators. Guihai Yan has authored over 60 SCI/EI papers and co-author 2 books. The research findings were published in the flagship conference of computer architecture ISCA (CCF A), HPCA (CCF A), IEEE TC (CCF A),the flagship conference of circuit design DAC (CCF A), DATE (CCF B), and conference of low-power electronic design ISLPED (CCF B). He was nominated for ASPDAC '15 best paper. He was selected as China Computer Society (CCF) Excellent Doctoral Dissertation Award (less than 10 people nationwide every year), Excellent Doctoral Dissertation Award of the Chinese Academy of Sciences (top 1.7% of the Chinese Academy of Sciences), and the Best Doctoral Dissertation Award of the Year selected by IEEE TTTC in 2011 (the only one in Asia). He was awarded for the 2nd Outstanding Science and Technology Paper Award by China Association for Science and Technology (one of the 99 selected national wide), Beijing Science and Technology Award, and Science and Technology Progress Award (2nd Prize) by Chinese Society for Measurement. He served as conference committee in HPCA, ASPDAC, ATS, CTC, etc.
Selected Publications
1. [TC] Promoting the Harmony between Sparsity and Regularity: A Relaxed Synchronous Architecture for Convolutional Neural Networks, by Wenyan Lu, Guihai Yan, Jiajun Li, Xiaowei Li, Accepted by IEEE Transactions on Computers.2. [TCAD] ShuttleNoC: Power-adaptable Communication Infrastructure for Many-core Processors, by Hang Lu; Yisong Chang; Guihai Yan; Ning Lin; Xin Wei; Xiaowei Li
3. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ( Early Access ), 12 July 2018.
4. [HPCA] FlexFlow: A Flexible Dataflow Accelerator Architecture for Convolutional Neural Networks, by Wenyan Lu, Guihai Yan, Jiajun Li, Shijun Gong, Yinhe Han, Xiaowei Li, In proceedings of 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA), Austin, USA, 4-8 Feb. 2017
5. [TC] CoreRank: Redeeming "Sick Silicon" by Dynamically Quantifying Core-level Healthy Condition, by Guihai Yan, Faqiang Sun, Huawei Li, Xiaowei Li, IEEE Transactions on Computers, Volume: 65, Issue: 3, pp.716 - 729, March 1 2016
6. [TPDS] EcoUp: Towards Economical Datacenter Upgrading, by Jun Ma, Guihai Yan, Yinhe Han, Xiaowei Li
7. IEEE Transactions on Parallel and Distributed Systems, Volume: 27, Issue: 7, pp. 1968-1981, July 1 2016
8. [TC] An Analytical Framework for Estimating Scale-out and Scale-up Power Efficiency of Heterogeneous Manycores, by Jun Ma, Guihai Yan, Yinhe Han, Xiaowei Li
9. IEEE Transactions on Computers, Volume: 65, Issue: 2, pp. 367-381, Feb. 1 2016
11. [HPCA] AgileRegulator: A Hybrid Voltage Regulator Scheme Redeeming Dark Silicon for Power Efficiency in a Multicore Architecture, by Guihai Yan, Yingmin Li, Yinhe Han, Xiaowei Li, Minyi Guo, Xiaoyao Liang, In the Proceedings of High-Performance Computer Architecture Symposium 2012 (HPCA2012), New Orleans, Louisiana, pp.287-298, Feb. 25-29, 2012.
12. [TC] ReviveNet: A Self-adaptive Architecture for Improving Lifetime Reliability via Localized Timing Adaptation, by Guihai Yan, Yinhe Han, Xiaowei Li, IEEE Transactions on Computers (TC), Vol.60, No.9, pp.1219-1232, Sep. 2011.
13. [ISCA] Leveraging the Core-Level Complementary Effects of PVT Variations to Reduce Timing Emergencies in Multi-Core Processors, by Guihai Yan, Xiaoyao Liang, Yinhe Han, Xiaowei Li, In the Proceedings of the 37th Annual International Symposium on Computer Architecture (ISCA'10), Saint-Malo, France. pp.485-496, Jun. 2010. Selected Publications