Dr. Kan Shi is an Associate Professor at the Institute of Computing Technology, Chinese Academy of Sciences. His research interests include agile chip design and verification using reconfigurable hardware, and cloud data center accelerators. Dr. Shi received his PhD from Imperial College London in 2015, and then worked at Intel UK R&D center as an SoC Design Engineer, with a focus on developing FPGA-based SmartNIC/DPU/IPU and their applications in cloud data centers.
Dr. Shi received two HiPEAC Paper Awards, one best paper nomination (FPT), and IEEE Micro Top Picks 2023. He serves as a TPC member of top FPGA international conferences (FPGA/FCCM/FPT/FPL), Technical Steering Committee member of RISC-V international foundation, execute member of OpenHW Asia Workgroup.