LV FangAssociate Professor
Research Areas:
Chip Compilation;Architecture-Oriented Performance Analysis and Optimization;Compiler Development Efficiency
Department:
Key Laboratory Of Processors
Tutor Category:
Contact:
flv@ict.ac.cn
Personal Page:
https://agilecompiler.github.io/flv/

Dr. Lv is a senior engineer at the Institute of Computing Technology, Chinese Academy of Sciences. She received her Ph.D. degree in computer architecture from the State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, in 2014. Her main research interests include architecture-oriented performance analysis and optimization, compiler optimizations, etc. She is a member of CCF.


Projects

1. Agile Mid-End Optimization Techniques for Strategic Pilot Science and Technology Project of Chinese Academy of Sciences (Category A). 2022.11 – Present

2. Agile Compiler Techniques for Strategic Pilot Science and Technology Project of Chinese Academy of Sciences (Category C). 2020.01 - 2021.12

3. The Compilation System for Heterogeneous Memory in the 863 Project “Parallel Model and Programming Framework for Heterogeneous Memory-Oriented Computing Systems”. 2015.01 - 2017.01

4. Huawei A Class Project of High Throughput Server Project - Compiler for ARM32, ARM64 Chips. 2013.01 - 2014.01

5. High Performance Compiler for Loongson Processors for Core Electronic Devices, High-end Generic Chips and Basic Software. 2011.01 - 2014.01

6. High Performance Compiler for Loongson 3A Processor. 2008.01 - 2011.01

7. SIMD Optimized Compiler for Sunway Processors. 2006.12 - 2007.12

8. High Performance Compiler for Loongson 2E Chip Processors. 2003.07 - 2006.07

9. ORC Open Source Compiler for Intel Itanium Chip Processors. 2001.09 - 2003.07


Publications

1. Chen Lei, Jiacheng Zhao, Chenxi Wang, Ting Cao, John Zigman, Haris Volos, Onur Mutlu, Fang Lv, Xiaobing Feng, Guoqing Harry Xu, Huimin Cui. Unified Holistic Memory Management Supporting Multiple Big Data Processing Frameworks over Hybrid Memories. ACM Transactions on Computer Systems (TOCS), 2022

2. Hongna Geng, Fang Lv, Ming Zhong, Huimin Cui, Jingling Xue, Xiaobing Feng. Automatic Target Description File Generation. Journal of Computer Science and Technology. Mar. 2022. DOI 10.1007/s11390-022-1919-x

3. Fang Lv, Hao Li, Lei Wang, Ying Liu, Huimin Cui, Jingling Xue, Xiaobing Feng. Referee: A Pattern-Guided Approach for Auto Design in Compiler-Based Analyzers. 2020 IEEE 27th International Conference on Software Analysis, Evolution and Reengineering (SANER). IEEE, 2020:1-12

4. Ying Liu, Lei Huang, Mingchuan Wu, Huimin Cui, Fang Lv, Xiaobing Feng, Jingling Xue. PPOpenCL: a performance-portable OpenCL compiler with host and kernel thread code fusion. In Proceedings of the 28th International Conference on Compiler Construction (CC ’19). CC 2019: 2-16

5. Chenxi Wang, Huimin Cui, Ting Cao, John Zigman, Haris Volos, Onur Mutlu, Fang Lv, Xiaobing Feng, Guoqing Harry Xu. Panthera: holistic memory management for big data processing over hybrid memories. In Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI 2019). June 2019 Pages 347–362

6. Danqi Hu, Fang Lv, Chenxi Wang, Huimin Cui, Lei Wang, Ying Liu, Xiaobing Feng. NVM Streaker: a Fast and Reconfigurable Performance Simulator for Non-Volatile Memory Based Memory Architecture. The Journal of Supercomputing. Volume 74, Issue 8, August 2018. pp:3875–3903

7. Chenxi Wang, Fang Lv, Huimin Cui, Ting Cao, John Zigman, Liangji Zhuang, Xiaobing Feng. Heterogeneous Memory Programming Framework Based on Spark for Big Data Processing. Journal of Computer Research and Development,2018, 55 (2):246-264 

8. Chenxi Wang,Ting Cao,John Zigman,Fang Lv,Yunquan Zhang, Xiaobing Feng. Efficient Management for Hybrid Memory in Managed Language Runtime, Network and Parallel Computing. 2016. 

9. Lei Wang, Fan Yang, Liangji Zhuang, Huimin Cui, Fang Lv, Xiaobing Feng. Articulation points guided redundancy elimination for betweenness centrality. ACM Sigplan Symposium on Principles and Practice of Parallel Programming. In Proceedings of the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP '16). February 2016. Article No.: 7. Pages 1–13

10. Fang Lv, Lei Liu, Huimin Cui, Lei Wang, Ying Liu, Xiaobing Feng, Penchung Yew. WiseThrottling: a new asynchronous task scheduler for mitigating I/O bottleneck in large-scale datacenter servers. The Journal of Supercomputing. Volume 71, Issue 8. August 2015. pp:3054–3093.

11. Fang Lv, Huimin Cui, Lei Wang, Lei Liu, Chenggang Wu, Xiaobing Feng, Penchung Yew. Dynamic I/O-Aware Scheduling for Batch-Mode Applications on Chip Multiprocessor Systems of Cluster Platforms. Journal of Computer Science and Technology. Volume 29, Pages 21–37 (2014).

12. Fang Lv,Huimin Cui,Wei Huo,Xiaobing Feng. Survey of Scheduling Policies for Co-Run Degradation. Journal of Computer Research and Development. 2014, 51(1):17-30.

13. Ying Liu, Fang Lv, Lei Wang, Li Chen, Huimin Cui, Xiaobing Feng. Research on Heterogeneous Parallel Programming Model. Journal of Software,2014, 25(7)

14. Lei Wang, Huimin Cui, Yuelu Duan, Fang Lv,Xiaobing Feng, Zhaoqing Zhang. An adaptive task creation strategy for work-stealing scheduling[C]. CGO 2010, the, International Symposium on Code Generation and Optimization, Toronto, Ontario, Canada, April. 2010:266-277.

15. Fang Lv, Lei Wang, Xiaobing Feng, Zhiyuan Li, Zhaoqing Zhang. Exploiting idle register classes for fast spill destination. In: Proceedings of the 22nd annual international conference on Supercomputing (ICS’08).

16. Lei Huang, Xiaobing Feng, Fang Lv. A Register Pressure Sensitive Instruction Speculative Scheduling Technology. Journal of Computer Research and Development, 2009, 46(3):485-491.

17. Chao Zhang, Fang Lv, Lei Wang, Xiaobing Feng. An Address Register Promotion Method Based on Feedbacks. Journal of Computer Research and Development, 2009, 46(4):698-704.


Honors and Awards 

2007 and 2008 Outstanding Employees of the Institute of Computing Technology, Chinese Academy of Sciences